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HP0-660 NonStop Kernel Basics (Level 1)

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HP0-660 exam Dumps Source : NonStop Kernel Basics (Level 1)

Test Code : HP0-660
Test title : NonStop Kernel Basics (Level 1)
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: 154 true Questions

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HP NonStop Kernel Basics (Level

The HP-UX Kernel: primary company | killexams.com true Questions and Pass4sure dumps

This chapter is from the booklet 

we acquire used the term abstraction and will disburse a minute talking about what it potential with reference to kernel design. once they accept as proper with the job of aid management, they ought to examine the degree of control they need to Put into consequence in their management scheme. one of the crucial tricks of the alternate involves grouping particular person components of a gadget resource into uniform-sized blocks, chunks, extents, pages, etc. the availability of the resource is then tracked on the stage of those granular instruments, as a consequence reducing the complexity of kernel information constructions.

A classic case is that of reminiscence management. a computer's actual RAM incorporates circuits representing single bits of records storage; these are mixed into sets of eight and known as bytes. An working system combines bytes into phrases (for HP-UX, a keep is 32 bits, or 4bytes; here is undoubted for both narrow and wide kernels). The word continues to exist a very small quantity of cupboard space, and if the kernel obligatory to manipulate every word (with the aid of manipulate, they insinuate maintain tune of which words are presently being used, which can exist free, and who's using what), the amount of reminiscence mandatory to construct such structures could conveniently require as an scandalous lot house as or greater than the remembrance being managed!

To reduce this administration overhead, they beget the managed unit dimension better than a word. In UNIX, here is accomplished through combining sequential actual words of remembrance into contraptions referred to as web page frames (on HP-UX the page body is 4096 bytes, or 1024 words). Now the job of keeping music of what's free and what is in disburse turns into much more straightforward. here is a extremely primary layer of abstraction; the kernel manages page frames, which you and that i know are in reality blocks of words made up of bytes that are eight-bits each.

a latest UNIX kernel may additionally disburse assorted layers of abstraction. Let's continue with their dialogue of primary reminiscence administration. UNIX kernels commonly employ a scheme whereby a manner that requires a pair of web page frames to hang its code is assigned an as it should exist sized belt in a digital web page-frame map. digital web page frames are mapped to selected physical web page frames through means of processor hardware and aiding kernel tables (discussed later in this ebook). This further layer of abstraction enormously simplifies issues equivalent to allowing two or greater tactics to participate the equal view of executable code, shared libraries, shared reminiscence, and different technique-level shared objects.

There are structures within the kernel to retain song of each component at each and every abstraction layer. Entities at greater layers conveniently component to the monitoring structures on the lower layers. lessen stage resource attributes are inherited by means of the higher abstraction layers.

Care need to exist taken in finding out the dimension of every management unit—too great and you'll squander a constrained useful resource; too small and the overhead of the monitoring constructions could exist excessive. The kernel fashion designer always walks a quality line between console and efficiency. As you gawk at aid administration, word the granularity of ply the kernel has over its costs.


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HP in NonStop rack server chase | killexams.com true Questions and Pass4sure dumps

Hewlett-Packard nowadays is rolling out an entry configuration of its NonStop frailty tolerant machines according to rack-set up servers as an alternative of the more expandable and greater expensive blade-fashion NonStop iron the enterprise has been peddling recently.

the new rack NonStop computer, the NS2000, is not much of a recrudesce to the previous for HP, which has delivered two rack-style, Itanium-based mostly NonStops to date.

HP ported the NonStop platform to the Itanium processor in June 2005, launching the NS16000 in response to single-core "Madison" Itaniums running at 1.5 GHz. The NonStop environment, which includes its own working device kernel and relational database, runs on a frailty tolerant cluster and is intended for on-line transaction processing. NonStop was created by pass of some ex-HPers who centered Tandem computer systems in 1974 to chase the IBM mainframe company. (Compaq ate Tandem in 1997 and HP ate Compaq in 2001).

Anyway, the first Itanium-based NonStop machines, the NS16000s, were nodes in a NonStop cluster, nodes that were in keeping with diverse servers using HP's own zx1 chipset. The NS16000 scaled from 2 to sixteen Itanium processors and from four GB to 32 GB of main reminiscence, with each and every node having from 10 to 60 ServerNet I/O connections. (ServerNet is the key frailty tolerant sauce within the NonStop design). These nodes can in swirl exist clustered to create a very gigantic frailty tolerant infrastructure with heaps of processors. a typical NS16000 node had between four and 8 Itanium processors and bought for round $1 million, according to HP on the time.

the following June, HP launched the NS1000, an entry computer in keeping with the Integrity rx2620 server that used 1.three GHz single-core "Madison" Itaniums and scaled as much as four server nodes. (The rx2620 is a two-socket container, but the NonStop spinoff most effectual allowed one processor per server board).

remaining summer season, HP announced a blade implementation of the NonStop platform, as a Part of its "blade every petite thing" strategy. HP likewise desired to enmesh the NonStop platform operating on benchmark HP servers, and in this case, the NS50000c blade server turned into itself in accordance with the Integrity BL860c blade server that HP Put into the bailiwick in February 2008. The NonStop kernel was tweaked to capture expertise of dual-core "Montvale" Itanium processors running at 1.sixty six GHz, however the NonStop blade most effectual used one of the crucial processor sockets in the dual-socket BL860c blade. (The aspect of the NonStop design is to acquire server redundancy, so cramming too many cores on one board defeats the goal).

Anyway, the NB50000c node is one rational processor within the NonStop cluster, and helps from eight GB to forty eight GB of main reminiscence. as much as four,080 rational processors (or eight,a hundred and sixty cores) can exist clustered together in the blade-trend NonStop bins. An entry-stage NB50000c configuration with two blades, a c7000 blade chassis, I/O controllers, and SAS drives for the blades ran about $300,000, and a regular entry configuration cost around $700,000, in accordance with HP.

in line with Randy Meyer, director of product administration for the NonStop line within HP's enterprise crucial systems division, the NB50000c has much more scalability than some NonStop consumers need, especially purchasers with older NonStop setups in accordance with MIPS processors from years in the past or new valued clientele who want frailty tolerance in Europe or emerging markets where their OLTP workloads are fairly modest. The MIPS-based NonStop S series machines acquire been sunsetted at the conclusion of 2008, so customers with these packing containers ought to delivery pondering an Itanium future, whether or not they infatuation it or now not. And with the brand new NS2000, HP is providing them a unique and cheaper altenative than purchasing an entry blade configuration.

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NonStop Kernel Basics (Level 1)

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Microsoft Adds 'Big Boobs' to Linux Kernel | killexams.com true questions and Pass4sure dumps

Microsoft has contributed thousands of lines of code to the Linux kernel, the open source software at the heart of the widely used Linux operating system. And now, the software giant has contributed some controversy too.

Sometime over the past few years, as Microsoft beefed up the Linux kernel with code related to its Hyper-V virtualization software, one unidentified developer needed a title for a piece of code used by the software, and for some unknown reason, he went with this: 0x__B16B00B5__.

That's hexspeak for "Big Boobs."

Red Hat kernel developer Matthew Garrett is not impressed. "At the most basic level, it's just straightforward childish humour," he wrote on his blog. "But it's likewise specifically male childish humour. Puerile sniggering at breasts contributes to the continuing impression that software evolution is a boys club where girls aren't welcome."

Microsoft apologized for the "offensive string" on Friday. "We acquire submitted a patch to fix this issue and the change will exist published in a future release of the kernel," the company said in an e-mailed statement.

That patch could cause endeavor for developers who disburse Microsoft's Azure cloud platform, which is based on Hyper-V, Garrett said in his blog post. "It's especially irritating in this case because Azure may depend on this constant, so changing it will smash things," he wrote. "So, replete marks, Microsoft. You've managed to beget the kernel more loathsome to half the population and you've made it inept for us to rectify it."

Microsoft has become a big-time contributor to Linux as it tries to beget its VMware-alternative, Hyper-V, a legitimate platform for Linux applications. Hyper-V is a pass of running many virtual servers – machines that exist only as software – on a single physical server.

In April, the Linux Foundation said that after adding totality that Hyper-V code to the kernel, Microsoft was one of the top 20 contributors to Linux. Developers there contributed 1 percent of the new Linux kernel code between October 2011 and January of this year, the Foundation said.

Microsoft developer K. Y. Srinivasan has contributed much of this Hyper-V code, though it's not lucid who came up with tall Boobs. He didn't respond to messages Friday.

This epic has been corrected to witness that 0xB16B00B5 is hexspeak.


Porting Linux to a new processor architecture, Part 1: The basics | killexams.com true questions and Pass4sure dumps

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August 26, 2015

This article was contributed by Joël Porquet

Although a simple port may count as petite as 4000 lines of code—exactly 3,775 for the mmu-less Hitachi 8/300 recently reintroduced in Linux 4.2-rc1—getting the Linux kernel running on a new processor architecture is a difficult process. Worse still, there is not much documentation available describing the porting process. The point of this series of three articles is to provide an overview of the procedure, or at least one feasible procedure, that can exist followed when porting the Linux kernel to a new processor architecture.

After spending countless hours becoming almost fluent in many of the supported architectures, I discovered that a well-defined skeleton shared by the majority of ports exists. Such a skeleton can logically exist split into two parts that intersect a Great deal. The first Part is the boot code, signification the architecture-specific code that is executed from the minute the kernel takes over from the bootloader until init is finally executed. The second Part concerns the architecture-specific code that is regularly executed once the booting angle has been completed and the kernel is running normally. This second Part includes starting new threads, dealing with hardware interrupts or software exceptions, copying data from/to user applications, serving system calls, and so on.

Is a new port necessary?

As LWN reported about another porting sustain in an article published last year, there are three meanings to the word "porting".

It can exist a port to a new board with an already-supported processor on it. Or it can exist a new processor from an existing, supported processor family. The third alternative is to port to a completely new architecture.

Sometimes, the respond to whether one should start a new port from scratch is crystal clear—if the new processor comes with a new instruction set architecture (ISA), that is usually a beneficial indicator. Sometimes it is less clear. In my case, it took me a pair weeks to figure out this first question.

At the time, May 2013, I had just been hired by the French academic computer lab LIP6 to port the Linux kernel to TSAR, an academic processor architecture that the system-on-chip research group was designing. TSAR is an architecture that follows many of the current trends: lots of small, single-issue, energy-efficient processor cores around a scalable network-on-chip. It likewise adds some nice innovations: a full-hardware cache-coherency protocol for both data/instruction caches and translation lookaside buffers (TLBs) as well as physically distributed but logically shared memory.

My pickle was that the processor cores were compatible with the MIPS32 ISA, which meant the port could topple into the second category: "new processor from an existing processor family". But since TSAR had a virtual-memory model radically different from those of any MIPS processors, I would acquire been forced to drastically modify the entire MIPS offshoot in order to interlard this new processor, sometimes having almost no altenative but to compass entire files with #ifndef TSAR ... #endif.

Quickly enough, it came down to the most logical—and interesting—conclusion:

mkdir linux/arch/tsar Get to know your hardware

Really knowing the underlying hardware is definitely the fundamental, and perhaps most obvious, prerequisite to porting Linux to it.

The specifications of a processor are often—logically or physically—split into a least two parts (as were, for example, the recently published specifications for the new RISC-V processor). The first Part usually details the user-level ISA, which basically means the list of user-level instructions that the processor is able to understand—and execute. The second Part describes the privileged architecture, which includes the list of kernel-level-only instructions and the various system registers that control the processor status.

This second Part contains the majority—if not the entirety—of the information that makes a port special and thus often prevents the developer from opportunely reusing code from other architectures.

Among the principal questions that should exist answered by such specifications are:

  • What are the virtual-memory model of the processor architecture, the format of the page table, and the translation mechanism?

    Many processor architectures (e.g. x86, ARM, or TSAR) define a springy virtual-memory layout. Their virtual address space can theoretically exist split any pass between the user and kernel spaces—although the default layout for 32-bit processors in Linux usually allocates the lower 3GiB to user space and reserves the upper 1GiB for kernel space. In some other architectures, this layout is strongly constrained by the hardware design. For instance, on MIPS32, the virtual address space is statically split into two regions of the selfsame size: the lower 2GiB is dedicated to user space and the upper 2GiB to kernel space; the latter even contains predefined windows into the physical address space.

    The format of the page table is intimately linked to the translation mechanism used by the processor. In the case of a hardware-managed mechanism, when the TLB—a hardware cache of limited size containing recently used translations between virtual and physical addresses—does not accommodate the translation for a given virtual address (referred to as TLB miss), a hardware condition machine will transparently fetch the proper translation from the page table structure in remembrance and fill the TLB with it. This means that the format of the page table must exist fixed—and certainly defined by the processor's specifications. In a software-based mechanism, a TLB miss exception is handled by a piece of code, which theoretically leaves complete liberty as to how the page table is organized—only the format of TLB entries is specified.

  • How to enable/disable the interrupts, switch from privileged mode to user mode and vice-versa, enmesh the cause of an exception, etc.?

    Although totality these operations generally only involve reading and/or modifying inescapable bit fields in the set of available system registers, they are always very particular to each architecture. It is for this understanding that, most of the time, they are actually performed by small chunks of dedicated assembly code.

  • What is the ABI?

    Although one could mediate that the Application Binary Interface (ABI) is only supposed to concern compilation tools, as it defines the pass the stack is formatted into stack-frames, the ways arguments and recrudesce values are given or returned by functions, etc.; it is actually absolutely necessary to exist close with it when porting Linux. For example, as the recipient of system calls (which are typically defined by the ABI), the kernel has to know where to enmesh the arguments and how to recrudesce a value; or on a context switch, the kernel must know what to reclaim and restore, as well as what constitutes the context of a thread, and so on.

  • Get to know the kernel

    Learning a few kernel concepts, especially concerning the remembrance layout used by Linux, will definitely help. I admit it took me a while to understand what exactly was the distinction between low remembrance and tall memory, and between the direct mapping and vmalloc regions.

    For a typical and simple port (to a 32-bit processor), in which the kernel occupies the upper 1GiB of the virtual address space, it is usually fairly straightforward. Within this 1GiB, Linux defines that the lower portion of it will exist directly mapped to the lower portion of the system remembrance (hence referred to as low memory): signification that if the kernel accesses the address 0xC0000000, it will exist redirected to the physical address 0x00000000.

    In contrast, in systems with more physical remembrance than that which is mappable in the direct mapping region, the upper portion of the system remembrance (referred to as tall memory) is not normally accessible to the kernel. Other mechanisms must exist used, such as kmap() and kmap_atomic(), in order to gain temporary access to these high-memory pages.

    Above the direct mapping region is the vmalloc region that is controlled by vmalloc(). This allocation mechanism provides the capacity to allocate pages of remembrance in a virtually contiguous pass in spite of the fact that these pages may not necessarily exist physically contiguous. It is particularly useful for allocating a great amount of remembrance pages in a virtually contiguous manner, as otherwise it can exist impossible to find the equivalent amount of contiguous free physical pages.

    Further reading about the remembrance management in Linux can exist organize in Linux Device Drivers [PDF] and this LWN article.

    How to start?

    With your head replete of the processor's specifications and kernel principles, it is finally time to add some files to this newly created arch directory. But wait ... where and how should they start? As with any porting or even any code that must respect a inescapable API, the procedure is a two-step process.

    First, a minimal set of files that define a minimal set of symbols (functions, variables, defines) is necessary for the kernel to even compile. This set of files and symbols can often exist deduced from compilation failures: if compilation fails because of a missing file/symbol, it is a beneficial indicator that it should probably exist implemented (or sometimes that some configuration options should exist modified). In the case of porting Linux, this approach is particularly relevant when implementing the numerous headers that define the API between the architecture-specific code and the repose of the kernel.

    After the kernel finally compiles and is able to exist executed on the target hardware, it is useful to know that the boot code is very sequential. That allows many functions to abide vacant at first and to only exist implemented gradually until the system finally becomes stable and reaches the init process. This approach is generally feasible for almost totality of the C functions executed after the early assembly boot code. However it is advised to acquire the early_printk() infrastructure up and working otherwise it can exist difficult to debug.

    Finally getting started: the minimal set of non-code files

    Porting the compilation tools to the new processor architecture is a prerequisite to porting the Linux kernel, but here we'll assume it has already been performed. totality that is left to accomplish in terms of compilation tools is to build a cross-compiler. Since at this point it is likely that porting a benchmark C library has not been completed (or even started), only a stage-1 cross-compiler can exist created.

    Such a cross-compiler is only able to compile source code for bare metal execution, which is a impeccable proper for the kernel since it does not depend on any external library. In contrast, a stage-2 cross-compiler has built-in champion for a benchmark C library.

    The first step of porting Linux to a new processor is the creation of a new directory inside arch/, which is located at the root of the kernel tree (e.g. linux/arch/tsar/ in my case). Inside this new directory, the layout is quite standardized:

  • configs/: default configurations for supported systems (i.e. *_defconfig files)
  • include/asm/ for the headers dedicated to internal disburse only, i.e. Linux source code
  • include/uapi/asm for the headers that are meant to exist exported to user space (e.g. the libc)
  • kernel/: generic kernel management
  • lib/: optimized utility routines (e.g. memcpy(), memset(), etc.)
  • mm/: remembrance management
  • The Great thing is that once the new arch directory exists, Linux automatically knows about it. It only complains about not finding a Makefile, not about this new architecture:

    ~/linux $ beget ARCH=tsar Makefile: ~/linux/arch/tsar/Makefile: No such file or directory

    As shown in the following example, a minimal arch Makefile only has a few variables to specify:

    KBUILD_DEFCONFIG := tsar_defconfig KBUILD_CFLAGS += -pipe -D__linux__ -G 0 -msoft-float KBUILD_AFLAGS += $(KBUILD_CFLAGS) head-y := arch/tsar/kernel/head.o core-y += arch/tsar/kernel/ core-y += arch/tsar/mm/ LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) libs-y += $(LIBGCC) libs-y += arch/tsar/lib/ drivers-y += arch/tsar/drivers/
  • KBUILD_DEFCONFIG must hold the title of a cogent default configuration, which is one of the defconfig files in the configs directory (e.g. configs/tsar_defconfig).
  • KBUILD_CFLAGS and KBUILD_AFLAGS define compilation flags, respectively for the compiler and the assembler.
  • {head,core,libs,...}-y list the objects (or subdirectory containing the objects) to exist compiled in the kernel image (see Documentation/kbuild/makefiles.txt for particular information)
  • Another file that has its condition at the root of the arch directory is Kconfig. This file mainly serves two purposes: it defines new arch-specific configuration options that characterize the features of the architecture, and it selects arch-independent configuration options (i.e. options that are already defined elsewhere in Linux source code) that apply to the architecture.

    As this will exist the main configuration file for the newly created arch, its content likewise determines the layout of the menuconfig command (e.g. beget ARCH=tsar menuconfig). It is difficult to give a snippet of the file as it depends very much on the targeted architecture, but looking at the selfsame file for other (simple) architectures should definitely help.

    The defconfig file (e.g. configs/tsar_defconfig) is necessary to complete the files related to the Linux kernel build system (kbuild). Its role is to define the default configuration for the architecture, which basically means specifying a set of configuration options that will exist used as a seed to generate a replete configuration for the Linux kernel compilation. Once again, starting from defconfig files of other architectures should help, but it is quiet advised to refine them, as they minister to activate many more features than a minimalistic system would ever need—support for USB, IOMMU, or even filesystems is, for example, too early at this stage of porting.

    Finally the last "not really code but quiet really important" file to create is a script (usually located at kernel/vmlinux.lds.S) that will instruct the linker how to condition the various sections of code and data in the final kernel image. For example, it is usually necessary for the early assembly boot code to exist set at the very rise of the binary, and it is this script that allows us accomplish so.

    Conclusion

    At this point, the build system is ready to exist used: it is now feasible to generate an initial kernel configuration, customize it, and even start compiling from it. However, the compilation stops very quickly since the port quiet does not accommodate any code.

    In the next article, they will dive into some code for the second portion of the port: the headers, the early assembly boot code, and totality the most principal arch functions that are executed until the first kernel thread is created.

    (Log in to post comments)

    Windows PCs could enmesh a tall performance slowdown because of a flaw in Intel chips | killexams.com true questions and Pass4sure dumps

    Owners of Windows PCs with Intel processors affected by a newly discovered design flaw acquire an unpleasant altenative to make: Leave their PCs vulnerable to hackers, or install a fix that will significantly tedious down the performance of their computers.

    A software update by Microsoft that fixes the security flaw could cause the performance of the Intel chips to tedious down by as much as 30%, according to a report from The Register on Tuesday.

    The Intel processor flaw is related to software "kernels" -- the core of an operating system. At the most basic level, the kernel handles the interactions between the operating system and the processor.

    In this case, the issue reportedly has to accomplish with an exploitable security flaw in the pass that the kernel of the Microsoft Windows operating system interacts with Intel processors. A hacker could, hypothetically, capture advantage of this undesirable interaction to bypass regular security measures. While the software deserves some of the frailty here, most eyes are on Intel, given that the root of the issue has to accomplish with its own processors.

    It's a solvable problem, but the fix requires a rethinking in how kernels and processors interact. The proposed solution requires processors to accomplish more travail in terms of security and isolating bits of the kernel, signification a likely hit to performance.

    Microsoft's proposed fix could result in performance drops as tall as 30% in PCs that speed on Intel chips that were released as long as 10 years ago. The drop in performance could lead to "huge slowdowns in typical workloads,"according to the PythonSweetness developer blog.

    Intel-based PCs running the Linux operating system suffer from the selfsame problem. That could acquire tall implications for cloud computing, given that Linux is current in datacenters.

    And Apple Mac computers are likewise reportedly affected and will require an update to fix, as the flaw is primarily based in the physical Intel chip design. It's quiet unclear how the flaw and any update fixes will strike Apple computers.

    Chips made by AMD, Intel's vie in the computer processor market, accomplish not accommodate the flaw. AMD's stock jumped more than 6% on Wednesday as news of Intel's flawed chip design emerged, while Intel stock fell roughly 2.4%.

    Intel did not immediately recrudesce requests for comment. Microsoft has declined to comment.



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